Researchers at NASA’s Johnson Space Center (JSC) have patented an improved phase-locked loop (PLL) circuit that broadens the bandwidth, or available frequency range, of the circuit. Phase-locked loop circuits accept noisy, degraded reference clock signals as input and output phase-locked clock signals of the same frequency as those received but with a corrected wave shape. The advantage of the JSC-developed system is its broad bandwidth. Most PLL circuits operate only over a narrow input frequency range, but this system operates with a 2-48 megahertz (MHz) input. The technology is comparable to a system containing seven separate PLLs but instead has a single PLL that can be switched between seven different input ranges. The innovation will benefit any industry in which safe and timely clock signals are vital to operations. JSC has received patent number 6,859,509 for this technology.
Johnson Space Center has received patent protection (U.S. 6,859,509→) for this technology.
This technology is being made available through JSC’s Technology Transfer and Commercialization Office, which seeks to transfer technology into and out of NASA to benefit the space program and U.S. industry. NASA invites companies to consider licensing this technology for commercial applications.
If you would like more information about this technology or about NASA’s technology transfer program, please contact:Technology Transfer and Commercialization Office