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Nanoelectronics for Logic and Memory
 

Nanowire-based electronic devices offer great potential to implement future integrated nanoelectronic systems for both on-board computing and information storage. Future in-space exploration requirements include modular electronics which operate for long durations in radiation environments and offer performance similar to that in today's ground-based systems.

Benefit

The increasing needs for on-board computing and data storage will grow rapidly in order to keep pace with the requirements for high performance subsystems involved in flight demonstration projects and deep space operations. Examples are Integrated Systems Health Management, in-situ mission management and scientific data analysis. At the same time, mass, volume and power must be minimized for mission affordability. Nanowire-based electronic devices for logic and memory are very promising candidates to fill this need. 3-D nanowire devices may also lead to breakthroughs in nanoelectronics with novel, fault-tolerant operations and likely will extend CMOS scaling into affordable nano-scale manufacturing.

Research Overview

The research on nanoelectronics at the ACNT is composed of two closely related areas: nanowire synthesis, and logic & memory nanoelectronic device implementation.

We have developed chemical and physical synthesis processes to successfully grow a variety of semiconducting nanowires such as Si, Ge, In2O3, ZnO and SnO2. Depending on their material properties, these materials are to be used in specific applications. Currently, we are focusing on the controlled and directed growth of Si and Ge nanowires, as these two materials offer great compatibility with the industrial chip technology.

Figure 1. Vertically oriented 1-D nanowire growth. Figure 1. Vertically oriented 1-D nanowire growth.

Directed growth is a critical challenge for the practical design of nanowire-based electronics. At the ACNT, we have developed a synthesis technique in which the one-dimensional nanowires are epitaxially grown in the vertical direction.

A large array of vertical nanowires can find many applications in next-generation nanoelectronics. For a logic chip for computing, these vertically free-standing nanowires are used as channel materials of MOS transistors. Examples include 3-D integration of CMOS logic gates (see Figure 2). With a surrounded gate architecture, these tiny transistors offer great scalability due to superior control of short-channel effect and leakage, providing the ideal device architecture for sub-10nm CMOS. The nanowires may also serve as interconnects and other electronic components such as diodes or resistors, making an ultra-compact integrated chip possible.

The vertical nanowire array is also a preferred architecture for ultra-dense information storage. Figure 3 shows a nonvolatile memory chip built from a nanowire array. The parallel connection of many vertically grown nanowires offers ultra-high density for future terabit-scale data storage, while operated with very fast programming and data accessing due to its parallel cell structure.

Currently at the ACNT, we are investigating several critical modular technologies to build these devices featuring nanofabrication technology and the bottom-up growth technique.

Background

1-D nanostructures such as semiconducting nanowires play an important role in next-generation electronic devices. The nanowires, synthesized by chemical or physical processes, are nearly perfect single-crystal structures with diameters ranging from tens to hundreds of nanometers and lengths of a few micrometers. In addition to the intrinsic material advantages such as high transport and freedom from process-induced surface damage (as in top-down fabrication), the flexible design of nanowire growth process may lead to a variety of novel structures such as heterojunctions, composite wires, and core-shell wires that open doors to new electronic device technology.

Figure 2. 3-D nanowire-based logic gate (inverter). Figure 2. 3-D nanowire-based logic gate (inverter).

The potential applications of semiconducting nanowire have two facets. On one side, with its small geometry, high mobility, and perfect surface, nanowires can be used as channel materials of a field-effect transistor (FET), extending the scaling of traditional CMOS technology to beyond what bulk silicon technology could offer. Silicon or germanium nanowire-based FETs can potentially push the CMOS scaling down to 1nm gate length, breaking the barrier for top-down fabrication technology in both logic and memory applications. Nanowires can also be used as interconnect materials. On the other side, due to its high flexibility in growth engineering, nanowires may be used to fabricate new electronic devices based on quantum effects, in which the electron tunneling is used for device operation rather than the field effect mechanism. These new generation of devices would lead to nanoelectronic systems with more compact size, less power dissipation, and higher performance.

Figure 3. Vertical nanowire nonvolatile memory array with ultra-high density. Figure 3. Vertical nanowire nonvolatile memory array with ultra-high density.

At NASA Ames Research Center for Nanotechnology (ACNT), we are exploring the semiconducting nanowire-based electronic devices for both logic and memory applications, with an emphasis in high performance, low power, high density, as well as robustness for operation under the extreme environments that space exploration missions would demand.