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Links to broadcast quality audio files and transcripts -- Dr. Meyya Meyyappan, NASA Ames Research Center, Moffett Field, Calif. interviewed about using carbon nanotubes as 'iuterconnects' in integrated circuits or 'silicon chips.' Issued April 14, 2003.

Question 7. What are the three steps taken to put carbon nanotube interconnects in computer chips?

The audio recording is 1:35 minutes

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Full Transcript (below)


7. What are the three steps taken to put carbon nanotube interconnects in computer chips? (1:35 minutes)

Dr. Meyya Meyyappan: "We have three critical steps of how to go about integrating this carbon nanotube in an existing chip manufacturing platform. The very first step is depositing carbon nanotube using a technique called Plasma Enhanced Chemical Vapor Deposition at pre-specified locations, to grow them to the desired height. Okay, so that is step number one. And the technique I mentioned – the Plasma Enhance Chemical Vapor Deposition – it is a technique that is known to the semi-conductor manufacturing community. And so, in that sense it is easily integratable with something people know. And then the second step is to make these carbon nanotubes robust and to avoid cross talk between different interconnects. We fill the space between the various nanotubes with an insulator such as silicon dioxide. So, that is the second step. And the third, and the final step, is to get a very flat top surface. So, we do what is called a polishing step. It is called chemical mechanical polishing. So, these three steps together allow us to integrate a carbon nanotube into an existing manufacturing platform."

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